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| INTEGRATED CIRCUITS DATA SHEET TDA5345HT 5 V spindle & VCM driver combo Preliminary specification 1999 June 10 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo FEATURES * Single chip voice coil and spindle motor drivers: * Complementary outputs (Nmos & Pmos): No step-up converter needed * On-chip isolation switch to allow synchronous rectification at power-down * Suited for ramp load operation * Register based architecture: on-chip serial interface * Temperature shut down protection * Linear 3.3 V regulator using one external NPN transistor * Power monitor circuitrymonitoring the 5 V supply * 1 axis shock sensor amplifier * Switched capacitor regulator (-3 V) using 2 external capacitors and 2 external shottky diodes * All main internal functions can be independently put in Sleep mode * Small low profile package: TQFP64 (1.2 mm high). Spindle motor driver: * High efficiency drivers: 1.5 Max * 0.62 Amp capability, full wave (bipolar) drive * Internal current mirrors to measure the motor curren * Controlled fly-back pulse slopes, programmable through the serial interface * Active fly-back pulse limitation, using the Power MOS instead of diodes * Internal digital timing to control the commutations by back-EMF sensing (Start-up & running) * Internal speed loop combining FLL and PLL * Start-up current control by an internal 6-bit DAC (shared with the VCM loop). Voice coil motor (VCM) driver: * High efficiency drivers: 1.5 Max (without the external sense resistor); 0.4 Amp capability * External sense resistor to accurately control the VCM current * True AB Class linear amplifier with no crossover distortion * Internal 12-bit DAC to control the VCM transconductance input voltage * Internal 6-bit DAC to cancel the VCM loop offsets * Active fly-back pulse limitation, using the Power transistors instead of diodes TDA5345HT * 3-step programmable retract function activated by either the serial port or the power monitor circuitry * Back-EMF amplifier to monitor the actuator speed when ramp loading. Power Monitor: * Monitors the 5 V power supply * Power fault output (battery too low); threshold = 4.2 V * Power on Reset output; threshold = 4.1 V (Vdd5) * Threshold accuracy: +/-3%. 1999 June 10 2 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo GENERAL DESCRIPTION TDA5345HT The TDA5345HT is a combination of a voice coil motor and a spindle motor driver, designed for 5 V high performance portable small form factor hard disk drives. Communications with the micro-controller take place through a 16-bit 3-wire uni-directional serial port. Power dissipation is a major concern in portable drives, therefore each main function can be individually put in sleep mode when it is not used, to save as much power as possible. The serial port and the power monitor are the only functions which remain always active. The TDA5345HT integrates a spindle driver and the commutation logic that drives a three-phase brushless, sensorless DC motor in full wave mode. Commutations are generated from the internal back-EMF sensing circuitry from start-up to the running mode. An internal speed loop combining FLL and PLL technics makes sure that the spindle reaches the right speed, programmed through the serial port. The 6-bit DAC is used to limit the Start-up current by limiting the voltage on the speed loop filter. To reduce acoustical noise and current noise on both power supply and ground, the fly-back pulse leading edge slew-rate is controlled. 4 different slope values are programmable. To prevent internal parasitic effects, positive and negative fly-back pulses are clamped by the output power transistors themselves: lower NMOS transistors are turned ON to limit the negative fly-back pulses just below ground while upper PMOS limit the positive fly-backs just above the power supply. This active limitation is still active at power down during the VCM retract. In this way, an efficient back-EMF rectification is obtained (no diodes losses). The VCM driver is a linear transconductance amplifier; it is a true AB class with a 8 mA quiescent current. It means that there is absolutely no crossover distortion. An external compensation network is used to set the loop bandwidth and ensure the loop stability. With common VCM characteristics, the bandwidth can go up to 40 kHz. To prevent internal parasitic effects, positive and negative fly-back pulses are clamped by the output power transistors themselves. An on-chip 12-bit DAC is used to generate the VCM amplifier input voltage. This a signed converter, with an output range of [1.25 V ; 1.75 V] when the low gain is selected and an output range of [0.5 V ; 2.5 V] when the high gain is selected. The all VCM transconductance works then around a 1.5 V reference (available on one pin). It is possible to add an external notch filter between the 12-bit DAC output and the VCM loop intput. An other 6-bit DAC is used to cancel the Vcm loop offsets. An additional Vcm back-EMF amplifier is provided to monitor the actuator speed when ramp loading. A ramp unload circuitry is included as well. It can be activated through the serial bus (SoftRetract) or automatically initiated in case of temperature shut down or at power-down. The ramp unload sequence is made of 3 steps : brake, slow retract and then full power. The retract steps duration is set by means of internal programmable counters, clocked by the spindle back-EMF. In case of power down, this sequence is followed by a spindle brake. The three spindle lower power NMOS are switched fully ON together. The linear 3.3 V DC-DC converter is designed to drive an external power NPN that will supply the 3.3 V chips. It can be enabled or disabled by hardware, using the external Reg3v3On pin. The switched capacitor -3 V regulator is designed to supply a very clean negative voltage to the PreAmp IC in the drive. The shock sensor amplifier is intended to be connected to an external 1 axis shock sensor. The window comparator threshold is programmable through the serial bus. An internal circuitry provides either an analog or a digital information about the junction temperature. These two informations can be selected through the serial bus. When the analog output is selected, the voltage is proportional to the internal chip temperature. When the digital output is selected, it indicates that the temperature exceeds 145 C. An internal thermal shut down mode is initiated when the temperature is higher than 160 C: the 3 spindle outputs are disabled while the vcm is immediately retracted. The power monitor circuitry monitors the 5V power supply. The Power On Reset PORN output is driven low when the 5 V supply is below 4.1 V. This threshold can be changed by an external resistor divider. Once the power supplies is above its threshold, the Power On Reset output goes high after a delay that is set by an external capacitor. A second output, called Power Fault (active HIGH), indicates that the 5 V power supply is below 4.2 V when high. There is no delay between the supply crossing the threshold and the PowerFault output change. 1999 June 10 3 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo TDA5345HT SpinCompens SpinSpeedFilter Speed Loop MechClock (FLL/PLL) (digital) Start-Up current limiter Power stage Power stage Spindle drivers Charge Pumps Bemf Comp SpinCenterTap SpinMotA SpinMotB SpinMotC CLOCK commutation manager (digital) SpinDigOut VcmCompensIn SEN_N SDATA SCLK BrakePower RetReset 3.3V RegNPNBase Regulator Reg3v3PwrUp RegSense Serial interface (digital) 6-bit DAC 12-bit DAC Vcm 3-step Retract & spindle brake AB class drivers Vcm back-EMF Amplifier + + VcmDacOut VcmInput VcmCompensOut VcmMinus VcmPlus VcmBemf OpAmpInM OpAmpOut PowerFault PorN PorCap Por5Adj Power On Reset Thermal monitor Fig.1 reference generator Vcm Current sense VcmSenseInM Amplifier VcmSenseInP Negative supply regulator Neg3V PumpNeg3V ShockInput ShockFiltOut Shock sensor amplifier ShockFiltOut TempMux ShockCompOut GENERAL BLOCK DIAGRAM 1999 June 10 4 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo PINNING (GREY ROWS MEANS NEW PINS)) SYMBOL SpinVddA SpinRectBemf SpinMotA VcmVddM SpinGndAB VcmMinus n.c.1 SpinMotB VcmGndPow SpinVddBC VcmPlus n.c.2 SpinMotC VcmVddP SpinGndC GNDAna1 VcmCompensOut TDA5345HT PIN # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 DESCRIPTION spindle MotA half bridge power supply spindle "Clamp": rectified Bemf spindle power output: A VCM- half bridge power supply spindle MotA & MotB half bridges ground VCM inverted power output (VCM-) not connected ; connect it to ground spindle power output: B VCM H-bridge ground spindle MotC & MotB half bridges power supply VCM non-inverted power output not connected; connect it to ground spindle power output: C VCM+ half bridge power supply spindle MotC half bridge ground analog ground VCM error amplifier output VCM loop reference voltage (1.5 V) VCM error amplifier inverted input VCM loop input internal Vdd5/2 reference voltage for the VCM VCM sense amplifier inverted input VCM sense amplifier non-inverted input analog power supply power On Reset output external capacitor used to set the Power On Reset delay internal band-gap reference voltage (for production trimming) 5 V power on reset threshold adjustment VCM Back-Emf amplifier output VCM Back Emf Operational Amplifier inverted input VCM Back Emf Operational Amplifier output analog ground external 33 k resistor hardware enable / disable for the 3.3 V regulator (at Power Up) -3 V regulator pump capacitor -3 V regulator output sense pin battery low warning digital timing clock serial port Data line digital power supply 5 I O O I/O SUPPLY GROUND O GROUND O GROUND I O GROUND O SUPPLY GROUND GROUND O O I I I/O I I SUPPLY O O I I O I O GROUND O I O I O I I SUPPLY VcmRef VcmCompensIn VcmInput VcmVdd5Div2 VcmSenseInM VcmSenseInP Vdd5Ana1 PorN PorCap BdGap Por5Adj VcmBemf OpAmpInM OpAmpOut GNDAna2 RefCurRes Reg3v3PwrUp PumpNeg3 V Neg3 V PowerFault CLOCK SDATA Vdd5Dig 1999 June 10 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo SYMBOL SCLK SEN_N SpinMechClock SpinDigOut RetReset RegNPNBase RegSense GndDig VcmDacOut ShockRef ShockFiltOut ShockCompOut ShockCom ShockAmpOut ShockInput Vdd5Ana2 TempMux SpinSpeedFilter SpinCompens BrakePower SpinCenterTap RetPmosDrain IsoSwSo GNDAna3 PIN # 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 serial port Clock serial port ENABLE line: active low spindle rotation speed (1 pulse / revolution) spindle back-EMF comparator output or commutation clock external capacitor used to reset the retract sequence state machine 3v3 DC-DC converter output (drives an external NPN) 3v3 DC-DC converter input digital ground 12-bit VCM DAC output shock sensor reference voltage shock sensor RC low pass filter output shock sensor comparator output shock sensor input common mode shock sensor amplifier output shock sensor input analog power supply internal thermal monitor circuitry voltage output external FLL/PLL speed loop filter spindle current loop compensation capacitor external capacitor to supply the spindle brake at power down spindle centre tap connection retract Pmos transistor drain connection spindle power outputs supply analog ground DESCRIPTION TDA5345HT I/O I I O O I O I GROUND O O O O I O I SUPPLY O O O I I O SUPPLY GROUND 1999 June 10 6 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo TDA5345HT 58 SPINSPEEDFILTER 52 SHOCKCOMPOUT 61 SPINCENTERTAP 54 SHOCKAMPOUT 51 SHOCKFILTOUT 59 SPINCOMPENS 60 BRAKEPOWER 62 PMRETDRAIN 55 SHOCKINPUT SPINVDDA 1 SPINRECTBEMF 2 SPINMOTA 3 VCMVDDM 4 SPINGNDAB 5 VCMMINUS 6 n.c.1 7 SPINMOTB 8 49 VCMDACOUT 48 GNDDIG 47 REGSENSE 46 REGNPNBASE 45 RETRESET 44 SPINDIGOUT 43 SPINMECHCLOCK 42 SEN_N 41 SCLK 40 VDD5DIG 39 SDATA 38 CLOCK 37 POWERFAULT 36 NEG3V 35 PUMPNEG3V 34 REG3v3PWRUP 33 REFCURRES GNDANA2 32 FCK121 53 SHOCKCOM TDA5345HT VCMGNDPOW 9 SPINVDDBC 10 VCMPLUS 11 n.c.2 12 SPINMOTC 13 VCMVDDP 14 SPINGNDC 15 GNDANA1 16 VCMCOMPENSOUT 17 VCMREF 18 VCMCOMPENSIN 19 VCMINPUT 20 VCMVDD5DIV2 21 VCMSENSELNM 22 VCMSENSELNP 23 VDD5ANA1 24 PORN 25 PORCAP 26 BDCAP 27 POR5ADJ 28 VCMBEMF 29 OPAMPLNM 30 OPAMPOUT 31 Fig.3 Pin configuration 1999 June 10 7 50 SHOCKREF 56 VDD5ANA2 57 TEMPMUX 64 GNDANA3 63 ISOSWSO Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo TDA5345HT PorN 25 Vdd5 On/Off Current mirror Ispindle 530 63 2 1 3 1 530 IsoSwSo VDD SpinRectBemf SpinVddA SpinMotA On/Off 5 SpinGndAB Ispindle 530 10 RSpinLoopGain OTA + On/Off 8 1 530 SpinVddBC SpinMotB 58 SpinSpeedFilter FLL/PLL CHARGE PUMPS On/Off voltage limiter (ext.) 6-bit DAC On/Off SpinMotC 33 1 530 (ext.) RefCurRes 59 On/Off 13 SpinGndC 15 (ext.) SpinCompens 44 61 SpinDigOut + Fig.4 Spindle section diagram. SpinCenterTap 1999 June 10 8 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo TDA5345HT (ext.) 19 VcmCompenIn 6-bit DAC (current) 17 VcmCompensOut 2 SpinRectBemf 4 VcmVddM + 2.5 6 VcmMinus 20 9 VcmInput VcmGnd (ext.) Rsense VcmVddP 14 VCM -2.5 49 VcmDacOut 11 VcmPlus 12-bit DAC (voltage) VDD 26K VcmRef 18 1 1.5V 1 26K 22 VcmSenseInM 3 23 21 VcmVdd5Div2 Fig.5 VCM section diagram. (ext.) VcmSenseInP 1999 June 10 9 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo FUNCTIONAL DESCRIPTION Serial interface TDA5345HT The serial interface is a uni-directional port for writing data to the internal registers of TDA5345HT. Each write is composed of 16 bits. For data transfer SEN_N is brought low, serial data is presented at SDATA pin, and a serial clock is applied to the SCLK pin. After the SEN_N pin goes low, the first 16 pulses applied to the SCLK pin shifts the data presented at the SDATA pin into an internal shift register on the rising edge of each clock. An internal counter prevents more than 16 bits from being shifted into the register. The data in the shift register is latched when SEN_N goes high. If less than 16 clock pulses are provided before SEN_N goes high, the data transfer is aborted. All transfers are shifted into the serial port MSB first. The first 4 bits of the transfer determine the internal register to be accessed. The other 12 bits contain the programming data. During sleep modes, the serial port remains active and register programming data is retained. SEN_N Receive data Address Tst Tsu Thd Tex SCLK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 SDATA A3 A2 A1 A0 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Write to TDA5345HT Fig.6 Serial port timing information. Table 1 A3 0 0 0 0 0 0 0 0 1 1 Address of registers A2 0 0 0 0 1 1 1 1 0 0 A1 0 0 1 1 0 0 1 1 0 0 A0 0 1 0 1 0 1 0 1 0 1 REG. 0 1 2 3 4 5 6 7 8 9 DESCRIPTION clock dividers programmation, spindle mode control start-up,comdelim & watch-dog delays blank delay, bandgap adjust, 3-step retract param (begin) 3-step retract parameters (end) fly-back slope, shock sensor threshold & sleep control bits speed factor (MSBs), PLL control and 6-bit DAC speed factor(LSBs) Vcm 12-bit DAC (low gain) Vcm 12-bit DAC (high gain) shock sensor threshold 1999 June 10 10 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo TDA5345HT Table 2 BIT\ REG 0 Serial Interface REGISTERS floorplan 11 10 9 8 Presc Factor1 [0] StartUp Delay0 Blank Delay0 T_Slow Ret5 7 Presc Factor0 [0] ComDe Lim3 DigOut Mux [1] T_Slow Ret4 Vcm Retract [0] PllCur 0 Speed bit7 Dac12a bit7 Dac12b bit7 6 BiasCT [0] ComDe Lim2 BdGap Adj2 [0] T_Slow Ret3 Vcm Sleep [1] Dac6 ToVCM [0] Speed bit6 Dac12a bit6 Dac12b bit6 5 Run/ Stop [0] ComDe Lim1 BdGap Adj1 [0] T_Slow Ret2 Dac12 Sleep [1] Dac6 bit5 Speed bit5 Dac12a bit5 Dac12b bit5 4 Pll Enable [0] ComDe Lim0 BdGAp Adj0 [0] T_Slow Ret1 RegNeg Sleep [1] Dac6 bit4 Speed bit4 Dac12a bit4 Dac12b bit4 3 Manual [0] Watch Dog3 VcmRet SoftRis T_Slow Ret0 Shock Sleep [1] Dac6 bit3 Speed bit3 Dac12a bit3 Dac12b bit3 2 Man Com2 Watch Dog2 Vretract 2 T_Vcm Brake2 Spin Sleep [1] Dac6 bit2 Speed bit2 Dac12a bit Dac12b bit2 1 Man Com1 Watch Dog1 Vretract 1 T_Vcm Brake1 Reg3v3 Enable [0] Dac6 bit1 Speed bit1 Dac12a bit1 Dac12b bit1 0 Man Com0 Watch Dog0 Vretract 0 T_Vcm Brake0 Temp Select [0] Dac6 bit0 Speed bit0 Dac12a bit0 Dac12b bit0 RegNeg RegNeg RegNeg Clk2 Clk1 Clk0 [0] [1] [0] StartUp Delay3 Blank Delay3 T_Full Power2 FlyBack Slope1 Speed bit14 Speed bit11 Dac12a bit11 Dac12b bit11 StartUp Delay2 Blank Delay2 T_Full Power1 StartUp Delay1 Blank Delay1 T_Full Power0 1 2 3 4 FlyBack Shock Shock Slope0 Thresh1 Thresh0 Speed bit13 Speed bit10 Dac12a bit10 Dac12b bit10 Shock Thresh2 [0] Speed bit12 Speed bit9 Dac12a bit9 Dac12b bit9 PllCur 1 Speed bit8 Dac12a bit8 Dac12b bit8 5 6 7 8 9 Note: 1. [1] (or [0]) means that the bit is set to 1 (or 0) when PorN is low => default value at power up. 2. Use register 7 (Dac12a) for low VCM loop gain and register 8 (Dac12b) for high gain. Control bits: REGISTER #0: Bits [11, 9] (RegNegClk[2, 0]): The Negative supply (-3V) regulator needs a 500 kHz clock. A programmable divider genreates this frequency from the external clock ([15-33] Mhz). Programmation is on 3 bits. Bits [8, 7] (PrescFactor[1, 0]): used to select the prescaler division factor (see next section: "commutation control"). Bit 6 (BiasCT): used to bias the spindle centre tap at Vdd5/2 when the spindle outputs are disabled (Run/Stop = 0). The back-EMF comparator remains operational when BiasCT = 1, to check if the spindle is running for instance. Bit 5 (Run/Stop): after the power supply is turned on and PorN is high, the motor will start spinning when Run/Stop is set to `1'. The spindle power output starts from state code 0 (see table 3). The motor will stop when this bit is set to `0'. The 3 spindle power outputs are then switched off. No brake is applied. bit 4 (PllEnable): enables the PLL to improve the speed accuracy. Bit 3 (Manual): selects the manual commutation mode (Run/Stop bit also needs to be high). When getting out of the manual mode (=> Manual = `0') and keeping the Run/Stop bit high, the internal commutation block will start from the last state programmed in manual mode. Bits [2, 0] (ManCom[2, 0]): control the commutation in manual mode when Run/Stop = 1 & Manual = 1. 1999 June 10 11 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo Table 3 Spindle power output states according to ManCom0, ManCom1, ManCom2 bit values. MANCOM[1] 0 0 1 1 1 0 0 1 TDA5345HT MANCOM[2] 0 0 0 1 1 1 1 0 MANCOM[0] 0 1 1 1 0 0 1 0 SPINMOT A low low float high high float low high SPINMOT B high float low low float high low low SPINMOT C float high high float low low low high STATE CODE 0 1 2 3 4 5 6 (brake) 7 (tripolar) REGISTER #1 bit [11, 8] (StartUp[3, 0]): programmable delay used to detect if the spindle is standing still at start-up. bit [7, 4] (ComDeLim[3, 0]): Used to set a default value for the spindle commutation delay. bit [3, 0] (WatchDog[3; 0]): programmable delay used to detect if the spindle is running backward at star-up. REGISTER #2 bit [11, 8] (BlankDelay[3, 0]): programmable delay used to blank the first edge of the spindle inductive fly-backs. bit 7 (DigOutMux): SpinDigOut pin is the commutation clock when DigOutMux = `1' else back-EMF comparator output. bit [6, 4] (BdGapAdj[2, 0]): used to adjust the internal BandGap reference voltage to improve several parameters. bit 3 (VcmRetSoftRising): Enables the digital soft rising slope on the "full power retract" step. bit [2, 0] (Vretract[2; 0]): used to program the VcmMinus output voltage during the "soft retract" step. REGISTER #3 bit [11, 9] (T_FullPower[2, 0]): used to program how much time the full power retract step is applied. bit [8, 3] (T_SlowRetract[5, 0]): used to program how much time the slow retract step is applied. bit [2, 0] (T_VcmBrake[2, 0]): used to program how much time the VCM brake step is applied. REGISTER #4 bit [11, 10] (FlyBackSlope[1, 0]): used to program the fly-back pulse leading edge slew rate. bit [9, 8] (ShockThresh[1, 0]): set the shock sensor threshold value. bit 7 (VcmRetract): activates a VCM retract when VcmRetract = `1'. bit 6 (VcmSleep): puts the VCM section (except the VCM sense amplifier and the VCM 12-bit DAC) in sleep mode when VcmSleep = `1'. bit 5 (DAC12Sleep): puts the VCM 12-bit DAC & the VCM sense amplifier in sleep mode when Dac12Sleep = `1'. bit 4 (RegNegSleep): puts the -3 V regulator in sleep mode when RegNegSleep = `1'. bit 3 (ShockSleep): puts the Shock sensor section in sleep mode when ShockSleep = `1'. bit 2 (SpinSleep): puts the Spindle section in sleep mode when SpinSleep = `1' ; SpinMotA, B, C are floating then. bit 1 (Reg3v3Enable): Enables the internal 3.3 V regulator when bit 1= `1'. 1999 June 10 12 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo TDA5345HT bit 0 (TempSelect): selects whether the TempMux pin is a digital output (temperature-high warning) when TempSelect = `0' or an analog output (temperature monitor) when TempSelect = `1'. REGISTER #5 bit [11, 9] (Speed[14, 12]): division factor used to set the spindle speed controlled by onboard FLL/PLL (2 MSBs only). bit [8, 7] (PllCur[0, 1]): Programmable current for the PLL charge pump. bit 6 (Dac6ToVcm): 6-bit DAC is connected to the VCM section when Dac6ToVcm = `1', else connected to the spindle. bit [5, 0] (Dac6[5, 0]): 6-bit word converted to a current by the 6-bit DAC. REGISTER #6 bit [11, 0] (Speed[11, 0]): division factor used to set the spindle speed controlled by onboard FLL/PLL (12 LSBs only). REGISTER #7 bit [11, 0] (Dac12a[11, 0]): 12-bit word sent to the VCM 12-bit DAC. Low gain selected for the VCM loop. REGISTER #8 bit [11, 0] (Dac12b[11, 0]): 12-bit word sent to the VCM 12-bit DAC. High gain selected for the VCM loop. REGISTER #9 bit [10] (Shock thresh[23):set the shnock sensor threshold value. 1999 June 10 13 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo Commutation control DELAYS TDA5345HT The spindle block contains both the low-side and high-side drivers configured as a H bridge for a three phase DC brushless, sensorless motor. In each of the six possible states, two outputs are active, one sourcing current and one sinking current. The third output presents a high impedance to the motor which enables measurement of the BEMF in the corresponding motor coil. The back-EMF comparator output (available on pin SpinDigOut) is processed by the commutation logic circuit to calculate the correct time for the next commutation, which will change the output state. The commutation block measures then the time between 2 consecutive zero-crossings and determines the actual commutation time and the next motor coils state. All the following situations must be taken into account: => Start up, No start, Backwards spin, Run and Manual commutation. The commutation logic keeps the motor spinning by commutating the motor each time a zero-crossing is detected. The delay between the zero-crossing and the actual output driver change is either internally calculated or programmable via the serial port (useful at start-up: no delay has been measured!). The internal commutation clock can be monitored on pin SpinDigOut (44). The falling edges are the relevant informations: they are caused by the zero-crossings. If preferred, SpinDigOut can be set to become the back-EMF comparator output, to check if the spindle is already spinning at power up for instance. If the spindle outputs are floating, don't forget to bias them, using the "BiasCT" bit, before considering the BemfCompOut value. Fig.6 and Fig.7 show typical motor commutation timing diagrams. State Code 0 1 2 3 4 5 SpinMotA SpinMotB L L L F H L H F F H H F H SpinMotC F H F L L Commutation Clock BemfCompOut Zero-crossing Fig.7 Input commutations to output drivers 1999 June 10 14 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo TDA5345HT SpinMotA SpinMotB SpinMotC ZOOM Blank1 WatchDog Blank2 StartUp Commutation delay CENTER TAP Commutation false zero crossings Zc1 Zc2 Zc3 Commutation true zero crossing fly-back pulse Fig.8 A typical motor commutation diagram The digital control block ignores any crossing while the Blank1 timer is counting. This means that the zero-crossing caused by the fly-back pulse leading edge (ZC1) is not seen by the commutation block. The WatchDog timer makes sure that the motor is running forward. If the motor is going backwards, the BEMF voltage will be inverted and the second crossing (ZC2) of the inductive pulse will not occur until the actual BEMF zero crossing. Therefore, if the WatchDog timer expires before a zero-crossing occurs, the motor is assumed to be turning backwards. The commutation is advanced one step to correct this condition. The second inductive zero-cross (ZC2) must occur within the WatchDog time. Therefore, the WatchDog must be set to a time that is greater than the fly-back pulse duration measured when the motor is standing still. The Blank2 timer starts counting as soon as the second zero-cross (ZC2) occurs. After the second inductive zero-crossing all extra zero-crossings are ignored during the Blank2 time. This allows the coil voltage to ring slightly without causing a commutation advance.To make the chip smaller, Blank1 and Blank2 have the same value: Blank. If the motor is not spinning, no BEMF zero-crossing will occur. The StartUp timer detects this if it expires before the true zero-crossing (ZC3) has occurred. It will advance the commutation one step if this happens. The Commutation Delay Limiter (ComDeLim) allows to control the maximum commutation delay time. This commutation delay time is equal to half the measured delay between 2 zero crossings (Zcmeasured). ComDeLim value should be 1999 June 10 15 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo TDA5345HT programmed to be the maximum allowable delay value. If Zcmeasured is lower than ComDeLim, the next commutation delay will be Zcmeasured divided by 2. If Zcmeasured is higher than ComDeLim, the next commutation delay will be ComDeLim value divided by 2. ComDeLim can be limited to guarantee a faster lock after the motor has gone out of lock. The clock used in the commutation control block is obtained by dividing the master clock of the chip (CLOCK: pin #38) by a clock divider (PRESCALER). This internal clock is named ClockOutPrescaler. All the delays described above (Blank, WatchDog and StartUp) are generated by a down-counter (called TIMER1). The time between two zero-crossings is measured by a second counter called TIMER2. The commutation delay and the ComDeLim are derived from TIMER2. Both counters are clocked on ClockOutPrescaler clock, which is programmable through the serial interface, using bit 7 & 8 of register #0: (ClockOutPrescaler should be chosen as typically 1 MHz) Table 4 Clock configurations PRESCFACTOR1 (BIT 8, REG#0) 0 0 1 1 TIMER PRESCFACTOR0 (BIT 7, REG#0) 0 1 0 1 CLOCKOUTPRESCALER CLOCK/4 CLOCK/8 CLOCK/16 CLOCK/32 1 Timer 1 is used to generate Blank, WatchDog and StartUp delays: It loads one of these programmed values and counts down till it reaches zero. All LSB bits are internally set to `1': bits [2:0] for Blank, bits [8:0] for WatchDog, bits [13:0] for StartUp. 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 StartUp WatchDog Blank Fig.9 Timer 1 configuration. Calculations: The actual delay will be: Delay = (Value * Step) + min, where: Value = the decimal value programmed in the considered register Step size = 2LSB / ClockOutPrescaler Min = (2LSB -1) / ClockOutPrescaler (bits from 0 to (LSB-1) are internally set to 1) maximum = (2(MSB+1) -1) / ClockOutPrescaler 1999 June 10 16 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo Table 5 Numeral application with CLOCK = 16 MHz CLOCKOUTPRESCALER= CLOCK/4 = 4 MHZ CLOCKOUTPRESCALER= CLOCK/8 = 2 MHZ CLOCKOUTPRESCALER= CLOCK/16 = 1 MHZ TDA5345HT DELAYS CLOCKOUTPRESCALER= CLOCK/32 = 0.5 MHZ MIN Blank WatchDog StartUp 3 s 127 s 4.1 ms STEP 4 s 128s MAX 63 s MIN 7 s 8.2 ms STEP 8 s 256 s 8.2 ms MAX 127 s 4.0 ms MIN 15 s 511 s STEP 16 s 512 s MAX 255 s MIN 31 s STEP 32 s MAX 511 s 2.05 ms 255 s 8.2 ms 1023 s 1024 s 16.4 ms 65.5 ms 65.5 ms 131 ms 16.4 ms 16.4 ms 262 ms 32.8 ms 32.8 ms 524 ms TIMER 2 TIMER2 is used to measure the delay between two zero-crossings and also to set the maximum commutation delay through comdelim delay: 11 10 9 8 7 6 5 4 3 2 1 0 ComDeLim Fig.10 Timer 2 configuration. Explanation: COMDELIM is the maximum value that can be reached by TIMER 2. So, this is the maximum delay between 2 zero-crossings. The maximum commutation delay is then half this value! Calculations: Delay between 2 zero-crossings ( Zc): step size = 2LSB / ClockOutPrescaler min = (2LSB-1) / ClockOutPrescaler (bits from 0 to (LSB-1) are internally set to 1) maximum = (2(MSB+1) - 1) / ClockOutPrescaler Maximum commutation delay: step size = 2(LSB-1) / ClockOutPrescaler maximum = (2(MSB) - 1) / ClockOutPrescaler Table 6 Numeral application with CLOCK = 16 MHz CLOCKOUTPRESCALER= CLOCK/4 = 4 MHZ CLOCKOUTPRESCALER= CLOCK/8 = 2 MHZ CLOCKOUTPRESCALER= CLOCK/16 = 1 MHZ CLOCKOUTPRESCALER= CLOCK/32 = 0.5 MHZ DELAYS ZC ComDeLim MIN 63 s 31 s STEP 64 s 32 s MAX 511 ms MIN 63 s STEP 128 s 64 s MAX 2.05 s MIN 255 s STEP 256 s MAX 4.1 ms MIN 511 s STEP 512 s 256 s MAX 8.2 ms 4.1 ms 1.02 ms 127 s 1.02 ms 127 s 128 s 2.05 ms 255 s 1999 June 10 17 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo Spindle current loop TDA5345HT The spindle current ISpin is sensed by internal current mirrors and copied to an internal resistor RSpinLoopGain. The current loop input is controlled by the internal FLL/PLL speed loop. The transconductance is defined by the following formula (see Fig.3) : I Spin 530 530 G Spin [ ( A ) ( V ) ] = -------------------------------------------- = ------------------------------------ = ----------------- = 312mA V R SpinLoopGain 1700 V SpinSpeedFilter The spindle current loop bandwidth is given by the following formula : (gm means transconductance : di/dv) R SpinLoopGain gm OTA x ------------------------------------ x gm NMOS I Spin -6 530 = ------------------------------------------------------------------------------------------- = 65.5 10 x ----------------------------------C SpinCompens 2 x C SpinCompens (1) BW SpinCurLoop (2) where the typical values for gmOTA and gmNMOS are : gmOTA = 50 A/V & gmNMOS = 2.62 x Sqrt(ISpin) A/V BWSpinCurLoop should be kept <= 20 kHz, whatever the current. Take care of the fact that the higher the current, the higher the BandWidth => the bandwidth is maximum at Start-Up. To make sure that the OTA output is 0V when Run/Stop bit = `0', a 30 mV (typ.) offset is introduced inside the OTA. By this way, we make sure that SpinCompens external capacitor is kept discharged until the next start-up. Spindle FLL/PLL speed loop : An internal speed loop is provided, intended to work with 12 poles spindle motors. It is mainly composed of a Frequency Locked Loop. A Phase Locked Loop can be associated when bit 9 in register #5 (PllOn/Off) is `1'. The typical FLL charge pump current is 500 A while the typical PLL charge pump current is given in table 7 : Table 7 PLL charge pump typical current (PllCur[1,0] are bits 8 & 7 in register #5): PLLCUR[1,0] 00 01 10 11 PLL CH. PUMP CURRENT 0.25 A 0.5 A 0.75 A 1 A A 15-bit division factor (Speed[14, 0]) is used to set the required speed split in bits [11, 9] in register #5 and bits [11, 0] in register #6: The Speed[14, 0] division factor can be calculated by : 5 CLOCK Speed [ 14, 0 ] = -- x -----------------------------------------------------------3 SpindleSpeed ( rpm ) Where CLOCK is between 10 MHz and 33 MHz. When the spindle is not running (Run/Stop = `0') the FLL charge pump discharge current is active so that the external filter is discharged before the next start-up. When the spindle is running (Run/Stop = `1'), the speed can be continuously monitored on pin SpinMechClock (1 pulse per revolution / 50% duty cycle waveform). SPINDLE / VCM 6-bit current DAC: An internal 6-bit current DAC is used to limit the spindle start-up current (bit 6 in register #5 : Dac6ToVcm = `0') or to cancel the VCM loop offset ( Dac6ToVcm = `1'). (3) 1999 June 10 18 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo TDA5345HT When the 6-bit DAC is used for the spindle, the LSB current is set externally, by means of a 33 k resistor (to have a very good absolute accuracy). The Spindle Current limit is then set by 31 steps of 20 mA. Please note that only the positive codes of the 6-bit DAC can be used, so only (25 - 1) = 31 steps can be defined. Table 8 Spindle Start-up current limit according to the spindle 6-bit DAC code : INPUT CODE 000000 000001 011111 SPINDLE START-UP CURRENT 0 mA 20 mA 620 mA When the 6-bit DAC is used for the VCM section, the LSB current is set by an internal resitor to have a good matching with the 2 internal resistors used to set the VCM loop Gain. The VCM current offset is set by steps of : 1.613 10 I VCMOffset ( LSB ) = ------------------------------ ( A ) R Sense Table 9 -3 (4) VCM current offset according to the spindle 6-bit DAC code (assuming that RSense = 1 , 1 LSB = 1.613 mA) : INPUT CODE 011111 000000 1111111 100001 100000 VCM OFFSET CURRENT +50 mA 0 A -1.613 mA -50 mA -50 mA VCM driver The VCM is a linear, AB class type with both low-side and high-side drivers configured as a H-bridge. The zero-current reference voltage for the VCM loop is internally set at Vdd5/2=2.5 V. The sense resistor Rsense enables the VCM current to be measured through the sense amplifier. The gain of the sense amplifier is internally set to typically 3. The output VcmSenseOut is given by the following equation: VcmSenseOut = 3 x ( VcmSenseInP - VcmSenseInM ) + VcmRef Figure 14 presents the VCM sense amplifier. VcmRef 18 IVCM 23 VcmSenseInP Rsense R + 3R R = 10 k (5) VcmSenseInM 22 R - 3R Fig.11 VCM sense amplifier 1999 June 10 19 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo TDA5345HT The error amplifier compares the VcmDacOut(49) input command and the VcmSenseOut(18) sense amplifier output signal to generate the control voltage of the power drivers. IVCM VcmSenseInP Rsense 23 + SENSE AMPLIFIER G=3 RFB VcmCompensIn Rin 20 Fig.12 VCM transconductance gain schematic. VcmDacOut - VcmRef VcmSenseOut - VcmRef 3 x R sense x I VCM ---------------------------------------------------------------- = ------------------------------------------------------------------------ = --------------------------------------------R FB R in R FB Finally, the transconductance gain of the VCM loop is given by the following equation: R FB I VCM 1 0.4 G VCM [ ( A ) ( V ) ] = ---------------------------------------------------------------- = --------- x -------------------------- = ----------------R in 3 x R sense R sense VcmDacOut - VcmRef VCM 12-bit resistive ladder DAC: The VCM loop input voltage is provided by an internal signed 12-bit resistive ladder DAC. The output voltage is a linear function of the input code written in register #7 (low gain) or register #8 (high gain), bits [11:0] : Table 10 Dac12 output voltage versus the input code (1 LSB = 125 V) when writing in register #7 : INPUT CODE (7FF)H (000)H (FFF)H (800)H VcmRef + 18 19 ERROR - AMP VcmCompensOut to the power drivers 17 VcmInput VcmSenseInM 22 (6) (7) DAC12 VOLTAGE 1.732 V -1 LSB 1.482 V 1.482 V -1 LSB 1.232 V Table 11 Dac12 output voltage versus the input code (1 LSB = 500 V) when writing in register #8 : INPUT CODE (7FF)H (000)H (FFF)H (800)H DAC12 VOLTAGE 2.482 V - 1LSB 1.482 V 1.482 V -1 LSB 0.482 V Warning : at power up, the 12-bit DAC needs to be programmed so that it is in a defined state. VCM back-EMF amplifier To prevent any actuator crash on the disk when a ramp load is used, an internal VCM back-EMF amplifier is build to monitor the actuator speed. Indeed, the VCM back-EMF is a picture of the actuator speed. The voltage across the VCM motor is divided in several contributions: 1999 June 10 20 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo TDA5345HT Act+ + IVCM VCM Act- <=> Act+ IVCM RVCM LVCM VCM back-EMF VVCM e + Fig.13 VCM motor model Act- dI VCM V VCM = ( R VCM x I VCM ) + L VCM x --------------- + e dt If the VCM current IVCM can be considered as constant, the back-EMF becomes: e = V VCM - ( R VCM x I VCM ) Figure 14 presents the VCM back-EMF amplifier as it is implemented in the TDA5345HT: (8) (9) VcmMinus (6) (ext.) Rsense IVCM R2 (ext.) OpAmpInM (22) (30) R1 (ext.) OpAmpOut (31) R 2R R = 10 k (ext.) VCM VcmSenseInM VcmBemf R VcmPlus (11) Fig.14 VCM back-EMF amplifier (29) 2R (18) VcmRef=1.482V The first operational amplifier output voltage (OpAmpOut) is: R1 OpAmpOut = VcmSenseInM - ------- x R Sense x I VCM R2 The VCM back-EMF amplifier output voltage (VcmBemf) is: VcmBemf = 2 x ( VcmPlus - OpAmpOut ) + VcmRef (11) (10) R1 VcmBemf = 2 x VcmPlus - VcmSenseInM - ------- x R Sense x I VCM + VcmRef R2 (12) 1999 June 10 21 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo TDA5345HT R1 VcmBemf = 2 x ( V cmPlus - VcmSenseInM ) + ------- x R Sense x I VCM + VcmRef R2 Where: V VCM = - ( VcmPlus - VcmSenseInM ) and if you set: R1 ------- x R Sense = R VCM R2 you get: VcmBemf = - 2 x ( V VCM - R VCM x I VCM ) + VcmRef (13) (14) (15) (16) VcmBemf = - 2 x e + VcmRef (17) VCM ramp unload sequence : The VCM ramp unload sequence can be ordered by either the serial interface or by internal emergency procedures: power down or temperature shut down. It will not start if VcmSleep bit is `1', because the actuator is supposed to be on the ramp already. Three different states are programmable : first a VCM brake, second a VCM slow retract and then a VCM full power retract. In all cases, the spindle isolation switch is cut off. If the power transistors are still supplied, the VCM current will come from the power supply, through the isolation switch parasitic diode. If the power transistors are no more supplied, the VCM current will come from the spindle itself. It is used as a generator, thanks to its back-EMF. When the sequence is initiated by a Power down detection, PorN signal will not go up until the end of the sequence. Figure 14 shows the link created between the spindle and the VCM power structures to transfer the spindle energy to the actuator : 1999 June 10 22 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo 63 (ext.) TDA5345HT VDD=5V 62 (ext.) Isolation switch, used in reverse mode SpinRectBemf 2 Retract PMOS 1 PA MotA NA NB PB 10 PC MotB NC 15 (ext.) 4 Off MotC Off NP- 14 Off VcmVcm+ N+ P+ On 5 GND=0V 9 VCM Rsense (ext.) (ext.) The back-EMF is synchronously rectified by the spindle power transistors: PA (resp. PB, PC) is switched On when MotA (resp. MotB, MotC) is above SpinRectBemf NA (resp. NB, NC) is switched On when MotA (resp. MotB, MotC) is below GND Fig.15 Power transistors structure during a retract phase During the VCM brake, VCM power transistors N- & N+ are switched fully On while transistors P- & P+ are switched off. During the soft retract step, N- transistor is switched off while the retract PMOS brings some current to the VCM. The control loop is drawn in figure 14 (the voltage on VcmMinus is regulated). Fig.16 VCM retract circuitry VcmMinus Rsense (ext.) (6) RetPmosDrain (62) SpinRectBemf (2) Retract PMOS retract amplifier VCM (11) On VcmPlus Programmable voltage divider Internal voltage reference => 125 mV in slow retract => 250mV in full power. 23 1999 June 10 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo TDA5345HT Table 12 VcmMinus voltage during the slow retract step versus Vretract[2:0] programming (bits [2:0] in register #2): VRETRACT[2:0] 111 ... 001 000 VCMMINUS VOLTAGE 1V ... 250 mV 125 mV In full power mode, VcmMinus voltage is limited to 2.8 V. When the spindle back-EMF is used as a supply (power down) the voltage will not be so high. The loop is working in saturation mode and the retract PMOS is fully saturated. It is possible to have a kind of "soft rising" slope on VcmMinus voltage when switching from the slow retract state (VcmMinus voltage is small) to the full power state (VcmMinus voltage is high). An internal digital counter generates some steps (250 mV high) from VVcmMinus(SlowRetract) to VVcmMinus(FullPower) when VcmRetSoftRis = `1' (bit 3, reg #2). During all the VCM ramp unload sequence, a programmable state machine is activated, clocked by the spindle back-EMF on SpinMotA. If TbEMF is the spindle back-EMF period, the steps duration will vary according to the following table: Table 13 Brake duration versus the T_VcmBrake[2:0] programming (bits [2:0] in register #3): T_VCMBRAKE[2:0] 111 ... 010 001 000 BRAKE DURATION 7*(2*TbEMF) +TbEMF ... 2*(2*TbEMF) +TbEMF 1*(2*TbEMF) +TbEMF 0 Table 14 Slow retract duration versus the T_SlowRet[5:0] programming (bits [8:3] in register #3): T_SLOWRET[5:0] 111111 ... 000010 000001 000000 SLOW RET. DURATION 63*TbEMF+TbEMF ... 2*TbEMF+TbEMF 1*TbEMF+TbEMF 0 Table 15 Full Power retract duration versus the T_FullPower[2:0] programming (bits [11:9] in register #3): T_FULLPOW[2:0] 111 ... 010 001 000 FULL POWER DURATION 7*(32*TbEMF) +TbEMF ... 2*(32*TbEMF) +TbEMF 1*(32*TbEMF) +TbEMF 0 * Include typical waveform 1999 June 10 24 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo TDA5345HT VCM+ SOFT RISING VCMBRAKE SOFT RETRACT FULL POWER BRAKE DELAY FCK135 Fig.17 The states for the VCM retract Spindle brake after retract sequence : In case of power down, an emergency procedure is initiated by the PorN signal : the spindle back-EMF is synchronously rectified to supply the VCM ramp unload function. At the end of the full power step, a spindle short-circuit brake is activated (SpinMotA, SpinMotB & SpinMotC are together short-circuited to ground). It is supplied by an external reservoir capacitor connected to pin BrakePower (60). Shock sensor amplifier: A complete circuitry is included on-chip to control an external shock sensor. Figure 14 shows a typical application diagram: 1999 June 10 25 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo TDA5345HT Shock Sensor RHPF Amplifier x20 ShockAmpOut Csensor (55) Cgain - Window comparator ShockInput + 1 (54) + - 2 + - ShockFiltOut ShockCompOut (51) 3 R 380k Amplifier x16.3 20k (50) ShockRef (53) ShockCom C 4 (52) 2V (ext.) Ccom programmable threshold Fig.18 Shock sensor control circuitry The first amplifier gain is given by : G = Cgain/Csensor. It has to be set so that the sensor voltage sensitivity becomes 220 V/G on the 1 st stage output. The 2nd amplifier stage gain is internally set to 16.3. The 3rd amplifier stage gain is internally set to 20. The external capacitor Ccom and RHPF have to be chosen so that : Ccomx20 k = CgainxRHPF. This time constant makes the input high pass filter pole. The internal RC low pass filter pole is 8 kHz typical. The window of the comparator input (ShockCompInP) is programmable through the serial interface. The values are given in the following table: Table 16 Window comparator threshold versus ShockThresh[1:0] (bits [9,8] in register #4): SHOCKTHRESH[1:0] 000 001 010 011 WINDOW 74 mV 148 mV 222 mV 296 mV 2ND STAGE INPUT SENSITIVITY 227 V 454 V 681 V 908 V 100 101 110 111 Temperature monitor: 370 mV 444 mV 518 mV 592 mV 1.135 mV 1.362 mV 1.589 mV 1.816 mV The TDA5345HT includes an analog circuitry that monitors the junction temperature. Figure 25 shows its diagram: 1999 June 10 26 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo TDA5345HT junction thermometer V160_Deg Temp shut Voltage Converter V145_Deg 1 0 TempMux 55 TempSelect (bit 0, reg#3) Fig.19 Temperature monitor circuitry The device is protected against over-temperature by the temperature shutdown circuit. When the temperature of the chip exceeds 160 C, the device is automatically set to a VCM retract and a spindle disable mode. It remains in this mode until the temperature goes below 160 C - 30 C = 130 C (30 C is an internal hysteresis). During normal operation, the signal TempMux provides either a voltage that is function of the chip temperature when TempSelect = `1' or a digital warning when TempSelect = `0'. When the analog information is selected, the equation of the voltage versus the temperature is: -3 V TempMux = 2.954 - 7.55 10 x Temperature ( C ) (18) When the digital information is selected, you get a temperature warning on pin TempMux (57). If the internal temperature over passes 145 C, TempMux = `1' and remains high until the temperature comes below 130 C (see Fig.19). VTempMux (V) Vdd5 0 0 130 145 TEMPERATURE (C) Fig.20 VTempMux behaviour versus temperature (TempSelect = `1') IT IS STRONGLY ADVISED TO USE THE TempMux INFORMATION (analog or digital) TO GENERATE EMERGENCY PROCEDURES INSTEAD OF WAITING FOR THE TEMPERATURE SHUT DOWN MODE TO TRIGGER. The temperature shut down has to considered as an ultimate self-protection. 1999 June 10 27 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo Power on reset TDA5345HT The Power On Reset circuit monitors the voltage level of +5 V supply voltage (pin named VddAna1). The PorN output (pin #25) is set HIGH when the +5 V supply voltage arise above a specified voltage threshold plus an hysteresis. This LOW to HIGH transition is delayed by a time TC that is determined by the external PorCap capacitor (connected to pin #26). This PorN output remains HIGH until +5 V supply drops below its voltage threshold. PorN output immediately becomes LOW. A brake after retract is initiated and the digital section is reset while PorN remains LOW. The CPorCap capacitor is charged by a constant current IPorCap. The voltage on PorCap pin is compared to the POR circuit reference voltage VPorRef. The TC time is set then by the following equation: V PorRef 3 1.23V T C = C PorCap x ------------------- = C PorCap x ------------------ = C PorCap x 615 10 -6 I PorCap 2 10 The TC time value only depends on the external CPorCap capacitor value. (19) VDD Vhysteresis threshold 1V t POR_N Tc Tc t Fig.21 Power on reset timing The value of the +5 V supply threshold voltage can be adjusted by adding an external resistor divider on the Por5Adj(28) . Internally, pin is designed as it is described in figure 20. Por5Adj (28) (24) RH5 VddAna1 to the POR circuit Fig.22 Por5vAdj pin It is advised to connect external capacitors on pins Por5Adj to filter the power supplies noise. See figure 21. RL5 GndAna2 (32) 1999 June 10 28 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo TDA5345HT Supply t Por5Adj signal with a capacitor V Vref=1.23V t PorN 5V Fig.23 Glitch detector timing 0V Tc t The PorN output can also be driven by the retract sequence manager: If there is a power supply failure at the sequence start-up or during the sequence, PorN will be kept low during all the programmed sequence, what ever the supply is restored or not. Vdd5 4.1V PorN Tc VCM- FCK136 Fig.23 Caution !! It is not allowed to wake the VCM up ( VcmSleep = `0'') if the spindle is not on speed, because a retract sequence would start on a power supply failure without any clock (generated from the spindle back-EMF). PorN would be maintained low by the retract manager, waiting for clock pulses. 1999 June 10 29 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo 3.3V linear regulator: TDA5345HT The TDA5345HT includes an analog amplifier suited to drive an external NPN that will supply the 3.3 V digital chips used in the application together with the internal digital outputs (pins SpinDigOut (44), SpinMechClock (43), PowerFault (37), ShockCompOut (52), TempMux (57)). The external pin Reg3v3PwrUp is used to enable (Reg3v3Pwr = 5 V) or disable the regulator (Reg3v3Pwr = 0 V). When Reg3v3Pwr = 0 V, it is possible however to wake the regulator up through the Reg3v3Enable bit (bit number 1 in register #4). It has been designed to minimise the external components count. Figure 25 shows the regulator diagram: Reg3v3Enable (from serial interface) Reg3v3PwrUp (34) 2SC4210 or similar NPN Vdd5 decoupling cap Enable (46) RegNPNBase 1.23V 800 RegSense (47) 2 k TempMux SpinDigOut PowerFault 1.24 k 3.26V To 3.3V ICs internal BandGap voltage reference 5 F SpinMechClock ShockCompOut Fig.25 3.3V linear regulator Negative supply regulator (-3 V) : A capacitor-based negative supply regulator is also provided. Due to process limitations, 2 external shottky diodes need to be added to the 2 external capacitors to make it work. Figure 25 shows the regulator diagram: 1999 June 10 30 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo TDA5345HT CLOCK Vdd5 Neg3V (36) Programmable divider 500 kHz Switch manager PumpNeg3V (35) Load 1.23V 3 bits RegNegClk[2,0] Band Gap Fig.26 -3V switched cap. regulator Depending on the external CLOCK value, the programmable CLOCK divider has to be programmed according to the following table : Table 17 Division factor to program in order to get 500 kHz for the -3 V switched cap. regulator : CLOCK 10 MHz 12.5 MHz 15 MHz 16.5 MHz 20 MHz 25 MHz 30 MHz 33 MHz REGNEGCLK[2:0] 000 001 010 011 100 101 110 111 DIVISION FACTOR 20 22 30 32 40 50 60 66 Adjustable bandgap : An internal regulated voltage source (called BandGap) delivers a very accurate voltage to many different circuitry inside the IC. This voltage (1.23 V) is almost independant of power supply, temperature and process spread. However, there is still a +/- 3% spread on this voltage. To come to about +/- 0.5%, it is possible to adjust this voltage from an external micro controller with a very accurate voltage source and an ADC. The following table gives the voltage added or substracted to the BandGap voltage according to the code written in register 2, bit 4 to 6. 1999 June 10 31 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo Table 18 BandGap : BDGAPADJ[2,0] 011 010 001 000 111 110 101 100 TDA5345HT VOLTAGE ADJUSTMENT -27.6 mV -18.4 mV -9.2 mV 0 mV 9.2 mV 18.4 mV 27.6 mV 0 mV 1999 June 10 32 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo QUICK REFERENCE DATA SYMBOL Supply voltage VDD5A/D Iout RDSon +5 V supply voltage 4.5 - Tj = 140 C VDD5 = 4.5 V start-up Brake Tj = 140 C VDD5 = 4.5 V - 5.0 PARAMETER CONDITIONS MIN. TYP. TDA5345HT MAX. UNIT 5.5 V Voice coil motor driver maximum VCM output current VCM power MOS total on resistance 400 - 1.5 mA Spindle motor driver Iout_StartUp Iout_Brake RDSon maximum spindle output current spindle output current spindle power MOS total on resistance 620 1.5 1.5 mA A ORDERING INFORMATION PACKAGE TYPE NUMBER NAME TDA5345HT TQFP64 DESCRIPTION plastic low profile quad flat package; 64 leads; body 10 x 10 x 1.2 mm VERSION SOT 357BB6 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VDD5A/D VDD5A/D VPeakVCM IPeakVCM VPeakSpin IPeakSpin Vi Ptot Tstor Tj(max) PARAMETER +5 V supplies +5 V supplies VCM drive output voltage VCM drive output peak current spindle drive output voltage spindle drive output peak current other pins total Power dissipation IC storage temperature junction temperature -55 - CONDITIONS indefinite time period see note1 Inductance connected to VCM+ and VCMpeak < 0.5 s Inductance connected to SpinMotA, B & C. peak < 0.5 s I < 1 mA -0.5 -0.5 MIN. - 0.3 -0.3 -0.5 MAX. 5.5 7 VDD5 + 0.5 1.0 VDD5 + 0.5 2.0 VDD5 + 0.5 1.1 +125 +140 UNIT V V V A V A V W C C Note to the limiting values: 1. Stress beyond these levels may cause permanent damage to the device. This is a stress rating only and functional operation of the device under this condition is not implied. 1999 June 10 33 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo RECOMMANDED OPERATING CONDITIONS SYMBOL VDDN TAMB TJUNC HANDLING PARAMETER supply voltage operating ambient temperature junctiontemperature MIN 4.5 0 0 MAX 5.5 85 140 UNIT V C C TDA5345HT Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling MOS devices. ESD according to MIL STD 883C - method 3015 (HBM 1 500 , 100pF) 3 pulses (+) and 3 pulses (-) on each pin versus ground - Class 1: 0 to 1 999 V THERMAL RESISTANCE SYMBOL Rth j-a PARAMETER from junction to ambient in free air (TQFP64, SOT 357BB6) VALUE 50 UNIT C/W This is obtained in a PCB tailored to heat dissipation : pin number 16, 32, 48, 64 have to be connected to a good ground layer to improve the IC heat dissipation. 1999 June 10 34 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo TDA5345HT ELECTRICAL CHARACTERISTICS (Condition: VDD5 = 4.5-5.5 V; TAMB = 0-85 C; unless otherwise specified); GBD means Guaranted by Design. 1. Supply current 1-1 Analog and power supply (pin 4, 14, 63, 24, 56together) when there is no current in spindle & VCM motors SYMBOL ISleep ISleep1 ISleep2 ISleep3 ISleep4 ISleep5 ISupply PARAMETER sleep current sleep mode 1 current sleep mode 2 current sleep mode 3 current sleep mode 4 current sleep mode 5 current supply current CONDITIONS all Sleep bits = `1' only Spindle is active only ShockSen is active only -3 V reg is active only DAC12 is active only DAC12 & VCM are active all sections are active MIN. TYP. 1.1 8.8 2.7 8 4.4 9 25.5 MAX. Unit mA mA mA mA mA mA mA 1-2 digital supply (Vdd5Dig) SYMBOL ISleep ISupply PARAMETER sleep current supply current CONDITIONS spinSleep bits = `1' spinSleep bits = `0' MIN. TYP. 56 78 MAX. Unit A/MHz A/MHz 2. DIGITAL section 2-1 Inputs / Outputs (3.3 V regulator ENABLED !) SYMBOL VIH VIL VOH VOL tr/f IIN PARAMETER high level input voltage low level input voltage high level output voltage low level output voltage rise/Fall time input leakage current (IOUT = 100 A) (IOUT = 100 A) C = 20 pF, GbD V3v3-0.5 0.4 20 +/- 1 CONDITIONS MIN. 2.0 0.8 TYP. MAX. UNIT V V V V ns A 2-2 16-bit serial interface SYMBOL fSCLK SCLK trSCLK tfSCLK tSTART tSU PARAMETER serial Clock serial Clock duty cycle serial Clock rise time serial Clock fall time chip Select to first Active clock edge data to clock setup time GbD GbD GbD GbD GbD GbD TSCLK/2 8 30 50 CONDITIONS MIN. TYP. MAX. 33 70 10 10 UNIT. MHz % ns ns ns ns 1999 June 10 35 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo TDA5345HT SYMBOL tHD tFINISH tWAIT PARAMETER clock to data hold time last active clock to chip select inactive on write time between successive serial port accesses GbD GbD GbD CONDITIONS MIN. 2 TYP. MAX. TSCLK/2 UNIT. ns ns CLOCK cycles 5 3. Spindle circuits 3-1 Spindle driver: (assuming that Resistor @ pin RefCurRes is exactly 33 k) SYMBOL RDSon IStartMax IStartStep IStartRes IRUN SR1 SR2 SR3 SR4 ACCR_FB Vfbmax Vfbmin IBP PARAMETER total FET resistance maximum start-up current start-up current step start-up current resolution running current fly-backs slew rate control fly-backs slew rate control fly-backs slew rate control fly-backs slew rate control relative accuracy on the 6 fly-backs slew-rate max voltage on spinmotx min voltage on spinmotx brake power leakage positive fly-back, I <100 mA neg. fly-back, I <100 mA PorN = "0", GbD continuous FlyBackSlope[0,1] = "00" FlyBackSlope[0,1] = "01" FlyBackSlope[0,1] = "10" FlyBackSlope[01] = "11" 19 48 105 222 -20 Vdd5+ 0.05 -0.35 V Vdd5+ 0.2 -0.2 V 5 26.5 59 124 256 5 CONDITIONS ISPIN = 620 mA DAC6[5,0] = "011111" 620 20 5 300 34 70 143 290 +20 Vdd5+ 0.35 -0.05 V 250 MIN. TYP. MAX. 1.5 UNIT. mA mA bits mA mV/s mV/s mV/s mV/s % V V nA 3-2 Spindle current loop (assuming that Resistor @ pin RefCurRes is exactly 33 k) SYMBOL ACCStCur ACCRStCur gmOTA PARAMETER spindle start-up current accuracy current relative accuracy between each phase OTA transconductance CONDITIONS IStUp > 400 mA IStUp > 400 mA GbD MIN. -6 -5 35 50 TYP. MAX. +6 +5 65 UNIT % % A/V 3-3 Spindle Fll Charge Pump (assuming that Resistor @ pin RefCurRes is exactly 33 k) SYMBOL Ich/disch SYMCur tr/f PARAMETER charge/discharge current charge/discharge currents symetry rise/Fall time GbD CONDITIONS MIN. 465 0.98 1 TYP. 500 MAX. 535 1.02 2 ns UNIT A 1999 June 10 36 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo 3-4 Spindle Pll Charge Pump (assuming that Resistor @ pin RefCurRes is exactly 33 k) SYMBOL Ich/disch00 Ich/disch01 Ich/disch10 Ich/disch11 SYMCur PARAMETER charge/discharge current charge/discharge current charge/discharge current charge/discharge current chargedischarge currents symetry rise/Fall time 3-5 back-EMF comparator SYMBOL VOSen VOSdis VCT PARAMETER comparator offset comparator offset center tap bias voltage CONDITIONS start up mode running mode biasCt = `1' or PorN = `0' MIN. 1 -5 TYP. 8 0 SpinRect Bemf/2 TDA5345HT CONDITIONS PllCur[1, 0] = "00" PllCur[1, 0] = "01" PllCur[1, 0] = "10" PllCur[1, 0] = "11" MIN. 0.212 0.425 0.612 0.808 0.93 TYP. 0.25 0.5 0.72 0.95 MAX. 0.287 0.575 0.828 1.09 1.07 1 2 UNIT A A A A GbD ns MAX. 15 5 Unit mV mV V 4. VCM circuits 4-1 VCM driver SYMBOL RDSon IOS IMax+400 IMax-400 IMax+100 IMax-100 Lin IQUIES VVcmVdd5Div2 GPD DISTO Vfbmax Vfbmin VRetRefSR VRetRefFP VRetLim RRetTot PARAMETER total FET resistance output offset current maximum positive current maximum positive current transconductance linearity quiescent current power driver gain crossover distortion max voltage on Vcm+ or Vcmmin voltage on Vcm+/retract circutry ref voltage retract circutry ref voltage retract voltage limitation total mos resistance in retract mode GbD positive fly-back, I<100 mA negative fly-back, I<100 mA slow retract mode full power retract mode full power retract mode spinRectBemf >= 2.5 V GbD Vdd5+ 0.1 -0.3 110 220 2.45 Vdd5+ 0.2 -0.2 125 250 2.8 CONDITIONS (I VCM= 400 mA) DAC12 = "00000000000" & RSense = 1 high Gain, without offset low Gain, without offset 3 different sections measured 2 legs of the H-bridge -3 4.8 4.95 -10 384 -416 92.5 -102.5 -3 3.4 400 -400 98.5 -98.5 MIN. TYP. MAX. 1.5 +10 416 -384 102.5 -92.5 +3 15 +3 5.1 0 Vdd5+ 0.3 -0.1 140 280 3.14 3.5 V V mV mV V UNIT mA mA mA mA mA % mA % V/V maximum negative current high Gain, without offset maximum negative current low Gain, without offset reference voltage accuracy Ref = Vdd5/2 1999 June 10 37 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo 4-2 VCM current control SYMBOL GBW VVcmRef VClampOutL VClampOutL PARAMETER error amplifier bandwidth Vcm loop ref. voltage error amp out clamping error amp out clamping CONDITIONS @ unity Gain, GbD generated by DAC-12 Vdd5 = 5 V Vdd5 = 5 V MIN. 4 1.402 1.2 3.6 TYP. 5.5 1.482 1.3 3.7 TDA5345HT MAX. 1.562 1.4 3.8 UNITS MHz V V V 4-3 VCM current sense amplifier SYMBOL VComMod BW RFB PSRR CMRR PARAMETER input voltage range bandwidth feed back resistor power supply rejection ratio common mode rejection ratio @ 1 kHz, GbD @ 1 kHz, GbD GbD CONDITIONS MIN. -0.3 260 2.5 60 60 530 3.145 3.9 TYP. MAX. VDD5 +0.3 UNIT V kHz k dB dB 4-4 VCM back-EMF amplifier SYMBOL VComMod VOL VOH PSRR CMRR GBW GBEMF2 VOS2 4-5 VCM DAC12 SYMBOL RESO12 tSET VrefHighHG VrefHighLG VrefMiddle VrefLowLG PARAMETER resolution settling time to within 0.5 LSB 2.382 1.652 1.422 code written to register #7 1.192 2.482 1.732 1.482 1.232 output voltage @ code 7FF code written to register #8 output voltage @ code 7FF code written to register #7 output voltage @ code 000 CONDITIONS MIN. 12 TYP. 12 2.0 2.582 1.852 1.542 1.272 MAX. UNIT Bits s V V V V PARAMETER input voltage range minimum output voltage maximum output voltage power supply rejection ratio common mode rejection ratio unity-gain bandwidth 1rst stage input offset 2nd stage amplifier gain 2nd stage output offset CONDITIONS both OpAmps both OpAmps, GbD both OpAmps, GbD both OpAmps, @ 1 kHz, GbD both OpAmps, @ 1 kHz, GbD 60 60 0.77 -5 1.96 -20 2 1.6 +5 2.04 +20 mV MIN. -0.3 100 VDD5 -0.1 TYP. MAX. VDD5 +0.3 UNIT V mV V dB dB MHz mV 1999 June 10 38 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo TDA5345HT SYMBOL VClampOutL INL12 DNL12 PARAMETER integral non-linearity differential non-linearity CONDITIONS MIN. 0.462 -5 -0.5 TYP. 0.482 MAX. 0.502 +5 +0.5 UNIT V LSB LSB output voltage @ code 800 code written to register #8 4-6 VCM offset current using DAC 6 SYMBOL RESO6 tSetFull tSetLSB IOffFullPos IOffFullNeg INL6 DNL6 PARAMETER resolution settling time, full range settling time, 1 LSB full scale positive current full scale negative current integral non-linearity differential non-linearity GbD GbD 45 -55 -1 -0.5 50 -50 CONDITIONS MIN. 6 TYP. 6 2.0 1.0 55 -45 +1 +0.5 MAX. Unit Bits s s mA mA LSB LSB 5. Others features 5-1 Power-On-Reset circuit: SYMBOL VT5 VH5 RL5 RATIO5v iCPOR VOP VOL RPU tRES PARAMETER threshold voltage level for the 5 V supply. 5 V detection hysteresis resistor between Por5Adj and GND por5Adj resistors ratio por cap current charge minimum operating voltage GbD low level output voltage pull up resistor response time IL = 1 mA between Vdd5 & PorN 14 20 0.5 Ratio5 = RL5 / (RL5 + RH5) CONDITIONS MIN. 3.98 80 TYP. 4.1 110 54 0.3 2.4 0.5 0.5 26 1 A V V k s MAX. 4.22 140 UNIT V mV k 5-2 Low voltage monitor circuit: SYMBOL VFAULT VHfault tRES PARAMETER fault detect voltage fault detection hysteresis response time CONDITIONS MIN. 4.08 70 TYP. 4.2 100 0.5 MAX. 4.32 130 1 UNIT V mV s 1999 June 10 39 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo 5-3 Thermal monitor SYMBOL VOLT VOHT VONT KTEMP TWarn TWhy TShut TShy PARAMETER output voltage at low temp CONDITIONS TJUNC = 0 C, TempSel = 1 MIN. TYP. 2.954 1.896 2.769 -7.55 tempSel = 0 145 15 160 30 TDA5345HT MAX. UNIT V V V mV/ C C C C output voltage at high temp TJUNC = 150 C, TempSel =1 output voltage at 25 C temperature coefficient thermal warning threshold temperature Shutdown thermal Shutdown hysteresis thermal warning hysteresis tempSel = 0 TJUNC = 25 C, TempSel =1 5-4 Shock Sensor SYMBOL Ileak Sin FcRC VT1 VT2 VT3 VT4 VT5 VT6 VT7 VT8 PARAMETER input sensitivity RC filter cut-off frequency 2nd stage input window 2nd stage input window 2nd stage input window 2nd stage input window 2nd stage input window 2nd stage input window 2nd stage input window 2nd stage input window shockThreh[2, 0] = "000" shockThreh[2, 0] = "001" shockThreh[2, 0] = "010" shockThreh[2, 0] = "011" shockThreh[2, 0] = "100" shockThreh[2, 0] = "101" shockThreh[2, 0] = "110" shockThreh[2, 0] = "111" CONDITIONS @ 1 kHz, GbD MIN. 35 6 122 386 612 816 1021 1226 1430 1634 8 227 454 681 908 1135 1362 1589 1816 10 306 522 750 1000 1248 1498 1747 1998 TYP. MAX. 5 Unit nA V kHz V V V V V V V V shockinput leakage current @ Vref = 2 V, GbD 5-5 3.3 V DC-DC linear converter SYMBOL ISOURCE ISINK CDEC VO VO_4v1 BW Note: 1. External NPN: 2SC4210 for instance PARAMETER source current sink current external decoupling cap output voltage output voltage control loopband width ILOAD constant & NPN VBE <= 0.7 V same as VO +Vdd5 = 4.1 V GbD 3.15 3.05 CONDITIONS MIN. 5 250 4.7 3.3 3.2 600 3.45 3.45 TYP. MAX. Unit mA A F V V kHz 1999 June 10 40 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo 5-5 -3 V switched capacitor regulator SYMBOL IOUT_max VOUT VOUT_4v1 RO Note: 1. CLOAD >= 9.4 F , CPUMP = 4.7 F PARAMETER maximum output current output voltage output voltage output ripple shottky diodes Vf <= 0.4 V shottky diodes Vf <= 0.4 V, tsw < 100ps & Vdd5 = 4.1 V Iout between 20 and 100 mA + Note 1 CONDITIONS MIN. 100 -2.88 -2.7 -3.0 TYP. TDA5345HT MAX. -3.12 Unit mA V V 30 mV 1999 June 10 41 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo TDA5345HT +5V (4) VcmVddM C1 (14) VcmVddP (63) IsoSwSo (40) (24) (56) Vdd5Dig Vdd5Ana1 Vdd5Ana2 Reg3v3PwrUp (34) RegNPNBase (46) RegSense (47) SpinMotA (3) SpinMotB (8) SpinCenterTap (61) SpinMotC (13) SpinRectBemf (2) SpinVddA (1) SpinVddBC (10) BrakePower (60) SpinSpeedFilter (58) SpinCompens (59) C9 BdGap (27) VcmBemf (29) TempMux (57) CLOCK (38) SCLK (41) SDATA (39) SEN_N (42) SpinDigOut (44) SpinMechClock (43) ShockCompOut (52) PowerFault (37) PorN (25) PorCap (26) Por5Adj (28) VcmGndPow(9) GndDig (48) C8 C7 Spindle T1 3v3 C14 (53) ShockCom (54) ShockAmpOut R1 (51) ShockFiltOut (55) ShockInput (50) ShockRef C2 R2 C2 R3 VCM (31) OpAmpOut (30) OpAmpInM (18) VcmRef (21) VcmVdd5Div2 (11) VcmPlus C13 C12 C11 R7 (62) RetPmDrain R4 (6) VcmMinus (23) VcmSenseInP (22) VcmSenseInM C3 (17) VcmCompensOut (19) VcmCompensIn (20) VcmInput (49) VcmDacOut C4 MR preamp C6 (45) RetReset (36) Neg3V (35) PumpNeg3V C5 (33) RefCurRes R6 (12) NC1 (7) NC2 C10 Analog to dig. conv R5 ASIC SpinGndAB SpinGndC GNDAna1 GNDAna2 GNDAna3 (5) Fig.27 TYPICAL APPLICATION SCHEMATIC 1999 June 10 42 (15) (16) (32) (64) GND Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo TDA5345HT NOTES 1999 June 10 43 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo TDA5345HT Data sheet status Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Production [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 1999 All rights reserved. Printed in U.S.A. Date of release: 09-99 Document order number: 9397 750 06404 Philips Semiconductors 1999 June 10 44 |
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